DK-DEV-4CGX150N

Cyclone Dev Tools

Cyclone® IV GX FPGA Development Kit

Altera Cyclone^® IV GX FPGA Development Kit provides a comprehensive, best-in-class design environment to develop low-cost and low-power FPGA system-level designs quickly. This kit helps to shorten your product’s development cycle so that you can meet your product’s time-to-market and production milestones. With this platform, you can develop and test PCI Express^® Gen1 x1, x2, x4 endpoint designs using the Cyclone IV GX PCI Express hard intellectual property (IP) PCI-SIG^®-compliant board.

Cyclone® Development Tools

Altera Cyclone® Development Tools are used to evaluate Altera Cyclone® FPGAs. Altera’s complete ecosystem supports designs and includes development kits, software, intellectual property (IP), design examples, Design Solutions Network partners, and Engineer-to-Engineer videos to reduce time to market. The Altera Cyclone kits are an ideal starting point for applications like embedded vision, factory automation, video connectivity evaluation, or concept-proving.

Cyclone® Family FPGAs

Altera Cyclone® Family FPGAs are built to meet low-power, cost-sensitive design needs, enabling designers to get to market faster. Each generation of these Altera products solves the technical challenges of increased integration, increased performance, lower power, and faster time to market while meeting cost-sensitive requirements.

SoC FPGA Family

Altera SoC FPGAs integrate an Arm-based hard processor system (HPS) consisting of processors, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The devices combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. These user-customizable Arm-based SoC FPGAs are ideal for reducing system power, cost, and board size by integrating discrete processors and digital signal processing (DSP) functions into a single FPGA. They differentiate the end product with custom hardware and software and add support for virtually any interface standard or protocol in the FPGA.